The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly, to a semiconductor device having a so-called double RESURF structure and a method of manufacturing the same.
In an examination of a high breakdown voltage LDMOS (Laterally Diffused Metal Oxide Semiconductor), it has been found out that the configuration obtained by combining the lateral MOS transistor having a vertical channel trench gate structure as illustrated in, for example, Japanese Patent Laid-Open No. 1999-274493 (Patent Literature 1) and a so-called double RESURF (REduced SURface Field) structure has a high consistency. In other words, by having the vertical direction channel by the trench gate, it is possible to reduce the area occupied by the whole transistor, and therefore, it is possible to promote miniaturization of the transistor. Further, by utilizing the improved breakdown voltage achieved by taking advantage of the double RESURF structure which tends to cause depletion, it is possible to increase the doping concentration in the drift region configuring the double RESURF structure and to achieve a reduction in the on-resistance of the transistor.